← 返回 JSSC 论文列表JSSC 2022第12期Data Converters28nmDelta-Sigma ADC
A 28-nm 6-GHz 2-bit Continuous-Time ADC With 101-dBc THD and 120-MHz Bandwidth
28纳米工艺下6GHz 2位连续时间ADC，实现101dBc THD和120MHz带宽
28nm CMOS, 6GHz, 2-bit, 101-dBc THD, 120-MHz BW, 108.8mW
连续时间ADCdelta-sigma调制器数字校准CMOS高线性度
▸采用基于反相器的放大器四级级联积分器
▸使用盲数字校准技术的2位量化器和反馈DAC
▸无需外部测试信号的校准技术
Abstract
In this article, a 6-GHz, 2-bit, fourth-order
continuous-time delta–sigma (CT /Delta1/Sigma1) analog-to-digital converter
(ADC) fabricated in 28-nm CMOS is presented. It achieves −101-
and −105-dBc total harmonic distortion (THD)/third-order inter-
modulation (IM3) typically and 72.3-dB signal to noise and
distortion ratio (SNDR) in 120-MHz bandwidth (BW). The ADC
comprises four cascaded integrators with inverter-based ampli-
fiers, an offset compensated 2-bit quantizer, and calibrated 2-bit
feed