JSSC 2023第1期Wireline I/O1ynmDRAM

A 1ynm 125V 8Gb 16GbsPin GDDR6-Based Accelerator-in-Memory Supporting 1TFLOPS MA

提出基于GDDR6的1.25V 8Gb 16Gbps内存加速器，支持深度学习操作并优化性能。

1.25V, 8Gb, 16Gbps/pin, 1TFLOPS

GDDR6内存加速器深度学习乘加操作激活函数

▸引入深度学习专用命令集以减少模式切换延迟

▸采用全局尾数移位方案优化乘加操作

▸利用DRAM存储查找表支持多种激活函数

Abstract

In this article, a 1.25-V 8-Gb, 16-Gb/s/pin GDDR6-based accelerator-in-memory (AiM) is presented. A ded- icated command (CMD) set for deep learning (DL) is introduced to minimize latency when switching operation modes, and a bank- wide mantissa shift (BWMS) scheme is adopted to minimize calculation delay time, current consumption, and circuit area during multiply-accumulate (M AC) operation. By storing the lookup table (LUT) in the reserved word line in the dynamic random access memory (DRAM) ba