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JSSC 2023第1期Clocking & PLLs28nmDRAM

A Supply-Noise-Induced Jitter Canceling Adaptive Filter for LPDDR5 Mobile DRAM Y

提出一种基于LMS算法的自适应滤波器，用于消除LPDDR5移动DRAM中的电源噪声引起的抖动。
28nm CMOS, 6.4 Gb/s, 60-mV PP 1-MHz supply noise, rms jitter从27.84 ps降至4.28 ps
电源噪声引起的抖动自适应滤波器LMS算法LPDDR5时钟分布网络
▸采用二阶自适应滤波器最大化时钟路径中的抖动消除
▸针对非线性电源至抖动特性进行优化
▸集成时钟分布网络和传输路径的抖动消除
Abstract
This article presents a supply-noise-induced jit- ter (SIJ) cancellation technique based on an adaptive filter (AF) using a least mean-square (LMS) algorithm. It cancels jitter along with the clock distribution network (CDN) and the transmit paths, which include serializers and pre-drivers. The proposed technique includes a second-order AF to maximize jitter cancellation in the clock path, which has a nonlinear supply-to- jitter characteristic. Implemented in 28-nm CMOS, the proposed SIJ cancella