JSSC 2023第2期Medical & Bio180nm CMOSBiosignal

A 43.3-μW Biopotential Ampliﬁer With Tolerance to Common-Mode Interference of 18 V pp and T-CMRR of 105 dB in 180-nm CMOS

一种具有高共模干扰容忍度的433μW生物电位放大器

105 dB TCMRR, 18 Vpp CMI容忍度, 1.90 µVrms输入噪声, 433 µW功耗

生物电位放大器共模干扰ECGCMRR低功耗

▸自适应总共模抑制比增强环路：该方法创新通过动态调整共模干扰电流，显著提升系统在接触阻抗不匹配情况下的总共模抑制比（TCMRR > 105 dB），解决了传统ECG放大器因阻抗失配导致的性能下降问题。

▸基于电荷泵的共模抑制环路（CMSL）：电路创新采用电荷泵结构实现共模抑制，结合阻抗自适应机制，使系统在18 Vpp/60 Hz强干扰下仍保持稳定，功耗仅433μW，突破了高干扰环境下的信号采集瓶颈。

▸快速稳定技术：系统创新通过优化环路响应时间（具体指标未公开），实现接触阻抗变化的实时跟踪（支持30%阻抗失配），确保ECG信号在动态环境中的快速恢复（输入噪声低至1.90 µVrms）。

▸高鲁棒性集成设计：芯片级创新通过180nm CMOS工艺将自适应环路、CMSL与低噪声放大器集成，在43.3 μW超低功耗下同步实现105 dB TCMRR与18 Vpp干扰容限，为可穿戴医疗设备提供新范式。

Abstract

In this article, we present an electrocardio- gram (ECG) ampliﬁer that has a large total CMRR (TCMRR) regardless of contact impedance mismatch and a large tolerance to common-mode interference (CMI). To achieve these features, an adaptive TCMRR enhancing loop is implemented in parallel with a charge-pump-based common-mode suppressing loop (CMSL). It adjusts the CMI current through each contact impedance so that common-mode (CM) to differential-mode (DM) conversion is minimized. We also propose a fast settling technique for the adaptive loop so that contact impedance variation can be tracked fast enough to allow robust ECG acquisition. A prototype chip fabricated in 180-nm CMOS achieves TCMRR larger than 105 dB even when there is contact impedance mismatch of up to 30%. It also achieves tolerance to CMI of 18 V PP at 60 Hz and input-referred noise of 1.90 µVrms while consuming 43.3 µW.