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JSSC 2023第2期Clocking & PLLs65nmVCO

A Low-Phase-Noise Quad-Core Millimeter-Wave Fundamental VCO Using Circular Triple-Coupled Transformer in 65-nm CMOS

一种基于圆形三重耦合变压器技术的低相位噪声毫米波四核VCO
相位噪声-104.7 dBc/Hz @1MHz偏移,FoM 186.5 dBc/Hz @59.1GHz
毫米波电压控制振荡器相位噪声多核同步变压器耦合
圆形拓扑结构通过减轻内部边缘破坏性耦合提高了毫米波频率范围内小电感器的Q值
三重耦合变压器提供了抑制门线圈中心点不必要振荡模式的灵活性,使NMOS-only VCO配置成为可能
三重耦合变压器提升了Gm晶体管的门源电压摆动
Abstract
The minimal achievable phase noise (PN) of millimeter-wave (mm-wave ) voltage-controlled oscillators (VCOs) is bounded by the smallest realizable inductor with a reasonable high quality factor ( Q). A multi-core VCO reduces the total equivalent inductance of the tank by synchronizing multiple VCO cores, therefore improving the PN performance. This article presents a 60-GHz fundamental VCO based on a mode-rejection circular triple-coupled-transformer tank, which improves the PN performance of the VCO from three aspects. 1) the cir- cular topology improves Q of small inductors in the mm-wave frequency range by alleviating the inner edge deconstructive coupling; 2) compared with the circular inductor topology, the triple-coupled transformer provides the flexibility to suppress the unwanted oscillation mode at the center taps of the gate coils, which enables the NMOS-only VCO configuration to avoid PN degradation due to limited PMOS performance in the mm-wave frequency range; and 3) the triple-coupled transformer boosts the gate-to-source voltage swing of G m transistors. The quad-core VCO prototype is designed and fabricated in a 65-nm CMOS process. It achieves a measured PN of −104.7 dBc/Hz at 1-MHz offset and a corresponding figure of merit (FoM) of 186.5 dBc/Hz at 59.1-GHz carrier frequency.