← 返回 JSSC 论文列表JSSC 2023第3期RF & Wireless22nmHigh-Speed Link
A Jitter-Robust 40 Gb-s ADC-Based Multicarrier Receiver Front-End With 4-GS-s Ba
一种抗抖动40Gb/s基于ADC的多载波接收前端，支持三频带信号传输。
22nm FinFET, 40Gb/s, 4GS/s, BER<10-5, 3.05pJ/bit
多载波接收机抗抖动ADC连续时间线性均衡器时间交织
▸支持多载波信号传输，时钟抖动要求降低约3倍
▸采用每频带优化的连续时间线性均衡器(CTLE)和四路时间交织7位流水线-SAR ADC
▸使用可复位积分器实现紧密频带间隔，减少信道间干扰(ICI)
Abstract
Demand for increased data rates in serial link
transceivers calls for innovative architectures capable of over-
coming impairments such as limited channel bandwidth (BW)
and stringent jitter specifications. This article presents a receiver
front-end (RXFE) architecture that supports multicarrier signal-
ing to provide a ∼3× relaxation in clock jitter requirements.
A total of 40 Gb/s data rate is supported by three 4-GS/s
bands with baseband (BB) four-level pulse amplitude modula-
tion (PAM4) and