JSSC 2023第4期Wireline I/O10nm级DRAM工艺DRAM

A 16 GB 1024 GB/s HBM3 DRAM With Source-Synchronized Bus Design and On-Die Error Control Scheme for Enhanced RAS Features Yesin Ryu , Sung-Gi Ahn, Jae Hoon Lee, Jaewon Park, Yong Ki Kim , Hyochang Kim , Yeong Geol Song, Han-Won Cho, Sunghye Cho, Seung Ho Song, Haesuk Lee, Useung Shin, Jonghyun Ahn, Je-Min Ryu, Sukhan Lee, Kyoung-Hwan Lim, Jungyu Lee, Jeong Hoan Park, Jae-Seung Jeong , Sunghwan Joo , Dajung Cho, So Young Kim, Minsu Lee, Hyunho Kim , Minhwan Kim, Jae-San Kim, Jinah Kim, Hyun Gil Kang, Myung-Kyu Lee, Sung-Rae Kim, Young-Cheon Kwon, Young Yong Byun, Kijun Lee, Sangkil Park, Jaeyoun Youn, Myeong-O Kim, Kyomin Sohn , Sang-Joon Hwang, and

本文提出了一种16GB HBM3 DRAM设计，通过源同步总线和片上纠错技术实现1024 GB/s带宽。

16GB容量，1024 GB/s带宽，8 Gb/s/pin，105°C高温稳定运行

HBM3高带宽内存纠错码数据总线可靠性

▸创新点1：源同步总线设计（方法创新） - 通过精确的时钟与数据对齐技术，解决了高带宽（1024 GB/s）下数据传输的时序挑战，显著提升了信号完整性，支持8 Gb/s/pin的高速数据传输。

▸创新点2：基于符号的片上纠错码(OD-ECC)（电路创新） - 采用子字线(Sub-WL)绑定的16位纠错能力，有效降低了DRAM单元软错误率，结合系统级RAS特性，使错误检测率提升92.2%。

▸创新点3：并行数据总线反转(DBI)（电路创新） - 通过动态优化数据模式减少总线切换功耗，同时与OD-ECC协同工作，在维持8 Gb/s/pin带宽下增强抗干扰能力，适用于高温（105°C）环境。

▸创新点4：可编程内存内建自测试(MBIST)（系统创新） - 提供基于测试集单元(TUs)的统一全速测试框架，支持灵活的错误修复策略（如RCC模式），显著提升量产测试效率和芯片可靠性。

Abstract

This article proposes practical design techniques to enhance performance and reliability of 1024 GB/s high- bandwidth memory-3 (HBM3). Effective data-bus design methods are applied to transfer data from multi-bank to a data-bus with a sufﬁcient data fetch margin. A symbol-based on-die error- correcting code (OD-ECC) to correct a 16-bit error, bounded by a sub-wordline (WL), and parallelized data-bus inversion (DBI) are implemented. Error check and scrub (ECS) mode and repair capability check (RCC) mode with an internal serial interface are designed to support system reliability, availability, and serviceability (RAS). A memor y built-in self-test (MBIST) provides a uniﬁed at-speed test with programmability based on test-set units (TUs). A 16 GB HBM3 fabricated in the third generation of the 10 nm class DRAM process achieves a bandwidth up to 1024 GB/s (8 Gb/s/pin) and provides stable operation at a high temperature (e.g., 105 ◦C) while improving an error detection rate by 92.2%.