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A 7-Gbps SCA-Resistant Multiplicative-Masked AES Engine in Intel 4 CMOS Raghavan
Intel 4 CMOS工艺下7Gbps抗侧信道攻击的乘法掩码AES引擎
7Gbps, 65%面积开销, 4%性能开销
AES侧信道攻击乘法掩码零值攻击Intel 4工艺
▸采用乘法掩码技术简化非线性S盒计算
▸双轨零值攻击检测与缓解电路
▸低开销掩码转换与乘法S盒数据路径设计
Abstract
A multiplicative masked advanced encryption
standard (AES)-128/-256 engine with measured side-channel
resistance to correlation power and electromagnetic (EM)
attacks in Intel 4 CMOS process is presented. While
conventional additive masking offers significant improve-
ments in minimum-time-to-discl osure (MTD) for the extracted
key bytes, mask compensations in non-linear Sboxes incur
>100% area overheads. Multiplicative masking provides a
simpler computation of non-linear inverse operation by
con