← 返回 JSSC 论文列表JSSC 2023第4期RF & Wireless4nm FinFET CMOSDAC
A 72-GSs 8-Bit DAC-Based Wireline Transmitter in 4-nm FinFET CMOS for 200 Gbs Se
4nm FinFET CMOS工艺中实现72GS/s 8位DAC的200Gb/s有线发射机
8-bit分辨率, 72GS/s, 288mW@0.95V, INL±0.67LSB, DNL±0.43LSB
数模转换器有线发射机源串联终端正交频分复用FinFET
▸采用分段架构和单端LSB实现高带宽
▸混合模拟/数字调谐优化MSB/LSB匹配
▸支持216Gb/s PAM8和212Gb/s OFDM调制
Abstract
This article details the design and measurement of a
digital-to-analog converter (DAC)-based source-series terminated
(SST) transmitter (TX) for wireline applications in 4-nm FinFET
CMOS technology. The DAC achieves 8-bit resolution and high
analog output bandwidth by using a segmented architecture along
with a single-ended LSB. Strength adjustment of the lower four
DAC LSBs relative to the upper four DAC MSBs is accomplished
with a hybrid analog/digital tuning approach, which overcomes
minimum