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A Charge Domain SRAM Compute-in-Memory Macro With C-2C Ladder-Based 8-Bit MAC Un
提出一种基于C-2C电容梯度的8位SRAM存内计算宏单元,实现高能效与计算精度平衡。
22FFL工艺, 32.2TOPS/W能效, 4.0TOPS/mm²面积效率, 0.5%计算误差
存内计算SRAM电容梯度模拟计算能效优化
▸采用1:2比例电容梯度的电荷域计算方案
▸局部权重复用技术提升存储密度
▸被动模拟计算机制确保PVT稳定性
Abstract
Compute-in-memory (CiM) is one promising solu-
tion to address the memory bottleneck existing in traditional
computing architectures. However, the tradeoff between energy
efficiency and computing precision plagues most CiM imple-
mentations, and the low precision imposes a major limitation
on CiM’s ability to support practical computational workloads.
In this article, a static random access memory (SRAM)-based
analog CiM macro is presented with the Intel 22FFL process.
By introducing a 1-to-2 rat