JSSC 2023第4期Data Converters22nmSAR ADC

A VTCTDC-Assisted 4 Interleaved 38 GSs 7b 60 mW SAR ADC With 13 GHz ERBW Amy Wh

一种采用VTCTDC辅助的四路交织38 GS/s 7位SAR ADC，具有13 GHz有效分辨率带宽和60 mW功耗。

22nm FinFET CMOS, 3.8 GS/s, 38 dB SNDR, 60 mW, 24.4 fJ/step

SAR ADC时间交织电压-时间转换器高带宽低功耗

▸使用单一高速电压-时间转换器(VTC)作为高带宽采样缓冲器

▸低功耗3位SAR辅助时间-数字转换器(TDC)提升SAR速度

▸最小化校准需求

Abstract

Compact, high-bandwidth analog-to-digital convert- ers (ADCs) with moderate resolution are a critical building block in high-speed communication links. In this work, a hybrid time and voltage domain ADC is presented that uses a single high-speed voltage-to-time converter (VTC) as a high-bandwidth sampling buffer for a four-way time-interleaved successive approximation (SAR) ADC. Time-domain encoding also enables a low-power 3b SAR assist time-to-digital converter (TDC) to enhance SAR speed with