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An 81.6 dB SNDR 15.625 MHz BW Third-Order CT SDM With a True Time-Interleaving Noise-Shaping Quantizer
本文提出了一种时间交织架构,解决了连续时间ΣΔ调制器中噪声整形SAR量化器的速度-分辨率瓶颈问题。
28nm CMOS, 6.4mW功耗, 0.072mm²面积, 15.625MHz带宽, 81.6dB SNDR
连续时间ΣΔ调制器噪声整形时间交织SAR量化器数据加权平均
▸时间交织架构实现噪声整形量化器的完全并行化
▸延迟引入反馈环路实现高量化器分辨率
▸数据加权平均技术消除校准需求
Abstract
This work introduces a time-interleaved architec- ture to tackle the speed-resolution bottleneck of the noise-shaping (NS) successive approximation register (SAR) quantizer in a continuous-time (CT) sigma-delta modulator (SDM). A critical insight is that introducing a delay in the NS quantizer feedback loop enables complete parallelization of the NS quantizer oper- ations. The extra time from parallelization greatly relaxes loop filtering and residue integration and enables a high quantizer resolution. Furthermore, the extra time in the feedback loop allows data weighted averaging (DW A), which eliminates the need for calibration. The prototype comprises a second-order CT front-end and a fully interleaved first-order NS quantizer. The prototype is fabricated in a 28 nm process, occupies 0.072 mm 2 and consumes 6.4 mW. The peak signal-to-noise ratio (SNR), signal-to-noise-distortion ratio (SNDR), and dynamic range (DR) are 83.9, 81.6, and 84.8 dB, respectively, in a 15.625 MHz bandwidth. The corresponding Schreier SNDR figure of merit (FoM) is 175.5 dB.