A − 124-dBm Sensitivity Interference-Resilient Direct-Conversion Duty-Cycled Wake-Up Receiver Achieving 0.114 mW at 1.966-s Wake-Up Latency

Abstract

This article presents an interference-resilient high-sensitivity binary frequency-shift keying (BFSK) multi- channel wake-up receiver (WuRX) supporting 900-MHz bands for low-power wide-area network (LPWAN) applications. The proposed WuRX uses a direct-conversion architecture, a frequency-to-energy demodulator, and a 4096-bit correlator. Direct conversion using a 50%-to-25% duty-cycle conversion mixer and two-stage ring voltage-controlled oscillator (VCO) minimizes the power consumption. The frequency-to-energy demodulator offers a process- voltage-temperature (PVT) variation-tolerant symbol recovery based on an image rejection n-path filter (IRNF), a poly-phase filter (PPF), and a quadrature envelope detector (ED). The 4096-bit correlator provides a digital processing gain of about 17 dB, improving both the sensitivity and the selectivity. To reduce the power consumption further, the proposed WuRX supports an asynchronous duty-cycling operation based on repetition of the wake-up code. Implemented in the 55-nm complementary metal–oxide–semico nductor (CMOS), the proposed WuRX achieves sensitivity of −124 dBm in the always-on mode while dissipating 781 µW. For the duty-cycling mode with wake-up codes repeated 15 times, the proposed WuRX exhibits the same sensitivity of −124 dBm with reduced power consumption of 114 µW and extended wake-up latency of 1.966 s. The proposed WuRX shows robust interference resilience with a signal-to-interference ratio (SIR) of −76 dB at a 20-MHz offs