JSSC 2023第6期Data Converters28nmSAR ADC

A Single-Channel V oltage-Scalable 8-GSs 8-b 375-dB SNDR Time-Domain ADC With As

提出一种采用异步流水线逐次逼近技术的8位8GS/s时域ADC，突破传统速度限制

28nm CMOS, 0.9V/0.7V, 8GS/s/5.05GS/s, 39.2dB/37.6dB SNDR

时域ADC电压可扩展异步流水线时间数字转换低功耗设计

▸异步流水线逐次逼近(APSA)技术缩短量化周期

▸VTC与TDC协同设计优化线性度

▸VTC中采用并发电荷重分配与电压拉升技术实现轨到轨输入

Abstract

This article presents a single-channel voltage- scalable 8-GS/s 8-b time-domain analog-to-digital-converter (TD-ADC). It breaks the speed limit of traditional TD-ADC by leveraging asynchronous pipeline successive approximation (APSA), which reduces the quantization period to approximate one-stage time-domain comparator decision time. A co-design methodology of voltage-to-time converter (VTC) and time-to- digital converter (TDC) is proposed to optimize the ADC lin- earity without increasing the c