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JSSC 2023第6期RF & Wireless180nm

Dual-Photodiode Differential Receivers Achieving Double Photodetection Area for Gigabit-Per-Second Optical Wireless Communication

本文提出两种双光电二极管差分光接收器,实现双倍光检测面积,支持千兆光无线通信。
2 Gb/s, BER 10^-9
双光电二极管光无线通信差分接收器跨阻放大器自适应消除
创新点1:双光电二极管差分光接收架构(系统创新) - 通过互补连接两个光电二极管,实现双倍光检测面积的同时保持接收器带宽,解决了单光束差分检测的难题,支持千兆比特级光无线通信。
创新点2:自适应直流光电流消除电路(电路创新) - 采用ADPC电路动态消除强光或不平衡入射光下的直流光电流,防止接收器饱和,显著提升了系统在非理想光照条件下的稳定性。
创新点3:低噪声分流反馈跨阻放大器(电路创新) - 提出基于差分对电流复用和交叉耦合电阻反馈的SF-TIA结构,将输入灵敏度提升至3.4 µApp(1.5 Gb/s时),较参考设计(10.4 µApp)降低67%,同时实现2 Gb/s数据传输。
创新点4:正电容反馈跨阻放大器(电路创新) - 作为对比方案,参考接收器采用正电容反馈技术优化TIA性能,在19.1 mW低功耗下仍实现2 Gb/s速率,为不同应用场景提供设计选择。
Abstract
This article presents two dual-photodiode (PD) dif- ferential optical receivers that achieve double photodetection area to support gigabit-per-second optical wireless communication (OWC), while maintaining the receiver bandwidth. To enable differential light detection with a single incident light beam, a dual-PD OWC receiver architecture is proposed. In this architecture, two PDs are connected to the receiver complemen- tarily without sacrificing the receiver bandwidth, and meanwhile, remain properly reversely biased. In addition, an adaptive dc photocurrent cancellation (ADPC) circuit is employed to prevent the saturation of the receivers under strong and imbalanced incident light. Based on the proposed architecture, two OWC receivers are implemented, including a proposed receiver and a reference one. In the proposed receiver, a low-noise shunt- feedback transimpedance amplifier (SF-TIA) with differential- pair-based current reuse and cross-coupled resistive feedback is proposed to enhance the sensitivity. In contrast, the reference receiver employs positive capacitive feedback to improve the transimpedance amplifier (TIA) performance. Both receivers have been fabricated with a standard 180 nm CMOS process and have been wire-bonded to two PDs. Experimental results indicate that both receivers can detect optical signals with data rates up to 2 Gb/s, and the proposed receiver architecture has significantly improved the bit error rate (BER) at 1.5 Gb/s from worse than 10−6–10−9