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JSSC 2023第7期Clocking & PLLs65nm

A1 -μW/MHz RC Oscillator With Three-Point Trimmed 2.1-ppm/◦C and Single-Point Trimmed 8.7-ppm/◦C Stability From − 40 ◦Ct o9 5 ◦C

提出一种无需相反温度系数电阻的RC振荡器,通过三点数字修调和温度补偿技术提高频率稳定性。
65nm CMOS, ±140 ppm频率误差(-40°C~95°C), 83-ppm/V电压灵敏度, 1.3-ppm Allan偏差, 1μW/MHz能效
RC振荡器温度补偿数字修调频率锁定环CMOS
无需相反温度系数电阻的一阶和二阶温度补偿技术
三点数字修调技术
基于多元线性回归模型的单点修调技术
Abstract
This article presents techniques to improve the frequency stability of RC oscillators by performing first- and second-order temperature compensation without needing resistors with opposite temperature coefficients (TCs). Using the proposed three-point digital trim, a prototype 100-MHz frequency-locked loop (FLL)-based RC oscillator fabricated in a 65-nm CMOS process achieves an inaccuracy of ±140 ppm over −40 ◦Ct o9 5 ◦C, 83-ppm/V voltage sensitivity, 1.3-ppm Allan deviation floor, and 1- µW/MHz power efficiency. When only a single-point trim is performed using a multiple linear regression model leveraging the strong correlation between three switched resistors, the frequency inaccuracy is ±587 ppm.