← 返回 JSSC 论文列表JSSC 2023第8期RF & Wireless65nmTransceiver
Low-Power Process and Temperature-Invariant Constant Slope-and-Swing Ramp-Based
提出一种低功耗、工艺和温度不变的高分辨率线性相位插值器,适用于多天线系统。
65nm CMOS, 503µW, 4.88ps分辨率, 1.6GHz, 0.021mm²
相位插值器低功耗工艺不变温度不变高线性度
▸采用电流积分技术生成恒定斜率和摆幅的斜坡信号
▸基于开关电容的偏置生成实现工艺、电压和温度跟踪
▸高线性度和低功耗设计
Abstract
This article presents a process- and temperature-
invariant high-resolution and highly linear low-power phase
interpolator (PI) as an enabler for discrete-time spatial signal
processors (SSPs) and for various mixed-mode RF transceiver
architectures. Using current integration techniques, the pro-
posed PI generates an adaptable constant slope-and-swing ramp
signal to achieve significantly lower power suited for multi-
ple antenna elements. Switched-capacitor-based bias generation
enables tracking