A 0.85-pJ/b 16-Gb/s/Pin Single-Ended Transmitter With Integrated V oltage Modulation for Low-Power

Abstract

A single-ended transmitter achieves low power con- sumption with an integrated voltage modulation (IVM) scheme for memory interfaces. The transmitter preserves the power advantages of the ground (VSS)-terminated single-ended sig- naling by consuming no static power when transmitting logic- 0s before the last bit of consecutive logic-0s (CLZs). All the intersymbol interference (ISI) accumulated during CLZs is compensated at once by the proposed IVM, which provides the unit interval (UI) spaced compensation voltage during the period of the last logic-0. The equalization, combining four-tap IVM and two-tap pull-up feed-forward equalization (FFE), allows the transmitter to be energy efficient without degrading the compensation effect. Per-UI basis IVM also has better immunity to noise and process, supply voltage, and temperature (PVT) variations than conventional phase equalization and pulsewidth modulation. The compensation effect and power consumption of IVM are also mathematically analyzed and compared with other conventional equalizations. A prototype chip fabricated in 65-nm CMOS has an area of 0.0168 mm 2 and achieves a data rate of 16 Gb/s/pin over a transmission channel with −12.6 dB loss, with an energy efficiency of 0.85 pJ/bit.