A Wideband Digital-Intensive Current-Mode Transmitter Line-Up

Abstract

A current-mode direct-digital RF modulator (DDRM)-based transmitter (TX) architecture is proposed in this article for energy-efficient wireless applications. To demonstrate its key principles, a 2 × 13 bit demonstrator is implemented in a 40-nm CMOS technology. This DDRM can operate stan- dalone or as a driver for a common-gate (CG)/common-base (CB) power amplifier (PA). The proposed DDRM is based on current-steering radio frequency digital-to-analog converters (RFDACs) that feature an extra current division path to allow the generation of the optimum current-mode class-B drive profile for the final CG/CB PA, facilitating energy-efficient TX operation without compromising linearity. For this purpose, the DDRM uses signed-IQ mapping combined with a class-B harmonic rejection (HR) technique. In addition, an advanced dynamic biasing technique is introduced to further enhance the TX line-up efficiency in deep power back-off (PBO) region. The DDRM driver standalone can provide 19.6-dBm RF peak output power. It supports a “160-MHz 256-QAM” signal at 2.4 GHz with an adjacent channel leakage ratio (ACLR) of −40.3 dBc and an error vector magnitude (EVM) of −33 dB, without using any digital pre-distortion (DPD). When connected to a CB SiGe PA, the overall TX line-up achieves an output power of 27 dBm and an overall TX system efficiency of 20%. This DPD-free TX line- up achieves an ACLR of −37.7 dBc and an EVM of −30 dB, respectively, when operating with an “80-MHz 64-QAM” signal at 2.2