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A 12-Bit 260-MSs Pipelined-SAR ADC With Ring-TDC-Based Fine Quantizer for Automa
一种采用环形TDC精细量化器的12位260MS/s流水线-SAR ADC，具有自动电压时间域对齐功能。
22nm CMOS, 0.8V, 260MS/s, 60.5dB SNDR, 77dB SFDR, 0.97mW
流水线-SAR ADC时间数字转换器电压时间域转换自动比例对齐低功耗
▸采用环形TDC作为精细量化器提高线性度和能效
▸环形TDC参与电压-时间转换实现自动域对齐
▸PVT变化下保持电压与时间域的自动比例对齐
Abstract
This article presents a power efficient and process,
voltage, and temperature (PVT) robust pipelined successive
approximation register (SAR) analog-to-digital converter (ADC)
that quantizes signals in both voltage and time domains. In this
work, a low-power SAR ADC is adopted as the coarse quantizer,
while a ring-configured time-to-digital converter (TDC) is utilized
in the fine quantizer to improve the linearity and power efficiency.
In addition, the ring TDC also participates in the voltage-to