C3MLS: An Ultra-Wide-Range Energy-Efficient Level Shifter With CCLS/CMLS Hybrid Structure

Abstract

Level shifters (LSs) are essential circuit elements in digital integrated circuits with multiple power domains. Cross- coupled LS (CCLS) and current mirror LS (CMLS) are the classical topologies. However, CCLS has a current contention issue, while CMLS suffers from high static current. In this article, a CCLS/CMLS hybrid LS, C 3MLS, is proposed for ultra-wide- range level conversions from extremely low voltage deep in the subthreshold region to nominal supply voltage. By maintaining the merits of CCLS and CMLS and utilizing them to kill the drawbacks of each other, the proposed C 3MLS achieves limited- current-contention and static-current-free level conversions. Var- ious other circuit optimizations, such as use of pass transistors, current limiter, multi-threshold voltage transistors, and short- channel effect aware sizing, are also applied for the proposed LS. A test chip is fabricated in the UMC 55-nm low power CMOS technology. The measurement results across 20 samples from ten dies demonstrate that the proposed LS achieves a propagation delay of 20.08 ns and an energy consumption per transition of 18.11 fJ (on average) for 0.3 V-to-1.2 V level conversion with 1-MHz input frequency. The proposed LS exhibits the lowest energy-delay product among the state of the art and an average static power consumption of 0.12 nW at VDDL = 0.3 V . The measured average minimum convertible input level from 20 samples is 196 mV and 56 mV at 1-MHz and 10-kHz input frequencies, respectively.