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Laser V oltage Probing Attack Detection With 100% Area/Time Coverage at Above/Below the Bandgap Wavelength and Fully-Automated Design
提出一种基于标准单元的光传感器结构,用于检测数字电路中的激光电压探测攻击。
28nm CMOS, 220nm激光点检测, 150%面积开销(最坏情况)
激光电压探测攻击检测标准单元光传感器AES加密
▸创新点1:标准单元设计兼容,无需校准。该方法创新性地采用标准单元设计,无需额外校准步骤,确保与现有自动化设计流程无缝集成,简化了设计复杂性。
▸创新点2:100%时间和面积覆盖。系统创新性地实现了全时间和全面积的激光电压探测攻击检测,确保在任何时间和任何区域都能有效防护,显著提升了安全性。
▸创新点3:低功耗设计,泄漏功率小于0.1%。电路创新性地优化了功耗设计,泄漏功率低于0.1%,在保证高效防护的同时,大幅降低了能耗。
▸创新点4:设计无关性,适用于多种芯片设计。该方法创新性地实现了设计无关性,可广泛应用于不同芯片设计,无需修改制造/封装流程,提升了通用性和实用性。
Abstract
In this work, a detection scheme signaling the occurrence of laser voltage probing (LVP) attacks in digital designs (e.g., cryptographic circuits) is introduced. The scheme comprises a standard cell-based photosensor fabric and dis- tributed detectors. By construction, the scheme conforms the standard cell design discipline, restricted layout design rules, and commercial place and route tools. This allows seamless integration with automated design flows, and immediate adoption in a design-agnostic fashion. Hundred percentage time and area coverage is achieved for full protection against LVP attacks, while not requiring any calibration. Extensive attacks with ∼150 h of characterization with a state-of-the-art LVP equipment on a 28-nm testchip demonstrate laser detection at both above- and below-bandgap wavelengths and, hence, even at the very low electron-hole pair generation rate of the former ones. Attacks to an advanced encryption standard (AES) core are shown to be flagged at any practical laser intensity and best- in-class true 220-nm laser spot. Low circuit activity confines its power to leakage, amounting to <0.1% of the AES power. At the worst case, 150% area overhead is substantially lower in practical cases where the information-sensitive blocks are a portion of it (e.g., <20% in an advanced reduced instruction set computer machines (ARM) Cortex-M4 processor with a secure AES accelerator). To the best of the authors’ knowledge, this is the first demonstration of a de