← 返回 JSSC 论文列表JSSC 2023第11期Data Converters28nmVCO
A 0004-mm 2 365-mW 7-Bit 2-GSs Single-Channel GRO-Based Time-Domain ADC Incorpor
基于门控环形振荡器的7位2GS/s时间域ADC，具有高能效和小面积。
28nm CMOS, 0.004mm², 2GS/s, 38.63dB SNDR, 50.66dB SFDR, 31.4fJ/conversion-step FoM
时间域ADC门控环形振荡器死区消除插值技术数字校准
▸采用死区消除技术的脉冲发生器提高线性度
▸稳健插值技术提升GRO插值精度和分辨率
▸数字辅助校准技术消除时间折叠偏移引起的量化误差
Abstract
This article reports an area-power-efficient 7-bit
2-GS/s time-domain analog-to-digital converter (TD-ADC) based
on a gated ring oscillator (GRO). A pulse generator (PG) with
the dead-zone elimination technique is devised for maximizing
the linearity of the gated signal. The GRO-based time-to-
digital converter employs a robust interpolation that effectively
increases the interpolation accuracy of the GRO and improves the
overall resolution. Also, a phase-tracking sampling generator is
developed