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A Polar-Modulation-Based Cryogenic Transmon Qubit State Controller in 28 nm Bulk CMOS for Superconducting Quantum Computing
一种基于极性调制的28纳米体CMOS低温超导量子比特控制器
28nm CMOS, 3.5K工作温度, 1 GS/s XY路径驱动器SFDR 40 dB, Z路径驱动器SFDR 48 dB, 每量子比特功耗13.7 mW
量子计算超导量子比特极性调制低温CMOS数字功率放大器
▸极性调制XY路径驱动器
▸电流导向DAC Z路径驱动器
▸注入锁定本地振荡器与恒定斜率数字时间转换器
Abstract
This article presents a cryogenic transmon qubit state controller integrated circuit (IC) working at a tem- perature of 3.5 K for superconducting quantum computing (QC) applications. The qubit state controller IC comprises a polar-modulation-based XY-path driver and a current-steering digital-to-analog converter (DAC)-based Z-path driver. To gen- erate the XY-path driving pulse with arbitrary envelopes in the frequency range of 4–6 GHz, a switched-capacitor digital power amplifier (DPA) is adopted for amplitude modulation, and an injection locking local oscillator (IL-LO) with a constant- slope digital-to-time-converter (DTC) is used for open-loop phase modulation. With the proposed DPA and IL-LO, the controller can control a qubit with a compact architecture. Fabricated in the 28-nm bulk CMOS process, the controller IC occupies an active die area of 0.9 mm 2 per driving channel. The controller achieves a spurious-free dynamic range (SFDR) of 40 dB for a 1 GS/s XY-path driver and an SFDR of 48 dB for a 1 GS/s Z-path driver at 3.5 K. The controller consumes a power of 13.7 mW per qubit. A Rabi experiment at 13.9 MHz, a Ramsey experiment at 3.09 MHz, and a T1 experiment at 15.87 µs are conducted using the presented controller IC at 3.5 K to control the transmon superconducting qubit at 10 mK directly. Manuscript received 8 May 2023; revised 19 July 2023 and 29 August 2023; accepted 29 August 2023. Date of publication 26 September 2023; date of current version 24 October 2023. T