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JSSC 2023第12期Clocking & PLLs180nmVCO

A Compact 10-MHz RC Frequency Reference With a Versatile Temperature Compensation Scheme

本文设计了一种紧凑的CMOS RC频率参考,采用温度补偿技术实现低温度系数。
180nm CMOS, 10MHz, ±2800 ppm (-45°C to 125°C)
CMOSRC频率参考温度补偿频率锁定环电压控制振荡器
使用温度依赖的参考电压抵消单电阻RC时间常数的温度系数
可在大多数CMOS工艺中实现,无需极性相反的电阻温度系数
通过修剪电容调整标称频率以补偿RC扩散
Abstract
This article presents the design and implementation of a compact CMOS RC frequency reference. It consists of a frequency-locked loop (FLL) that locks the period of a voltage-controlled oscillator (VCO) to the time an RC network takes to charge to a reference voltage. Conventionally, an RC time constant with a near-zero temperature coefficient (TC) is realized by using a trimmed network of resistors with dif- ferent TCs. In this work, such a network is used to realize a temperature-dependent reference voltage whose TC cancels that of a single-resistor RC time constant. Compared with the conventional approach, which requires resistors with TCs of opposite polarity, the proposed approach can be implemented with resistors with TCs of similar polarity, and so it can be implemented in most CMOS processes. To compensate for RC spread, a trimmed capacitor is used to adjust the nominal frequency. Two prototype chips were made, one based on p-/n-polysilicon resistors and other based on silicided/p-diffusion resistors. Fabricated in a standard 180-nm CMOS technology, the polysilicon-based prototype has an active area of 0.01 mm 2 and an absolute inaccuracy of ±2800 ppm from −45 ◦C to 125 ◦C with a fixed TC-trim and a one-point frequency trim. After one week of accelerated aging at 150 ◦C, however, significant drift (5000 ppm) was observed. The diffusion-based prototype exhibits greater inaccuracy (±14 400 ppm) but much less drift (600 ppm).