← 返回 JSSC 论文列表
📄 下载 JSSC 原文 PDF
JSSC 2023第12期RF & Wireless45nm PD-SOI

Harmonic-Resilient Fully Passive Mixer-First Receiver for Software-Defined Radios

一款用于5G新无线电应用的低损耗全被动谐波抑制混频器优先接收器
噪声系数3.5–5.5 dB, 带外输入三阶截点13–27 dBm, H3/H5阻塞器1dB压缩点10/4 dBm
谐波抑制全被动混频器5G新无线电高Q滤波阻塞器容忍
电荷共享与电容堆叠的协同设计
天线接口处的早期谐波抑制和高Q滤波
仅使用开关和电容器的全被动设计
Abstract
This article presents a low-loss fully passive harmonic rejection (HR) and blocker-tolerant mixer-first receiver (RX) for 5G new radio (NR) applications. This design exploits the codesign of charge-sharing and capacitor stacking to offer early HR and high-Q filtering at the antenna interface using only switches and capacitors. A prototype RX in 45-nm partially depleted silicon-on-insulator (PD-SOI) occupies 0.65 mm 2 and operates from 250 MHz to 2.5 GHz while consuming 32.4–54 mW. The proposed design exhibits a noise figure (NF) of 3.5–5.5 dB, an out-of-band (OOB) input-referred third-order intercept point (IIP3) of 13–27 dBm, and an H3/H5-blocker 1-dB compression point (B1dB) of 10/4 dBm. With a −5 dBm third-harmonic blocker, the design experiences less than 1 dB of NF degradation. This notable high degree of harmonic blocker tolerance is achieved by passively rejecting harmonic blockers before they undergo any voltage gain.