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JSSC 2024第1期Memory130nm

A 9-Mb HZO-Based Embedded FeRAM With 1012-Cycle Endurance and 5/7-ns Read/Write Using ECC-Assisted Data Refresh and Offset-Canceled Sense Amplifier Qiqiao Wu , Student Member , IEEE, Yue Cao

提出一种基于HZO的9Mb嵌入式FeRAM,具有高耐久性和快速读写性能。
2×剩余极化>30 µC/cm², >1012次耐久性, 7ns写入和5ns读取时间, <3V工作电压, 85℃下10年数据保持
FeRAMHZO非易失性存储器ECC耐久性
创新点1:温度感知ECC辅助写入驱动设计(电路创新) - 该设计通过结合温度感知机制与ECC技术,显著提升了FeRAM在高温环境下的写入可靠性和功率效率,支持10年数据保留和1012次循环耐久性。
创新点2:偏移消除感测放大器(电路创新) - 采用偏移消除技术,有效减小了感测放大器的输入偏移,从而容忍较小的位线信号裕度,降低了读取误码率(BER),实现了5纳秒的快速读取时间。
创新点3:基于虚拟的参考生成器(电路创新) - 通过引入虚拟单元生成参考信号,优化了读取路径的匹配性,进一步提高了读取的准确性和稳定性,支持57纳秒的读写操作速度。
创新点4:TiN/HZO/TiN铁电电容器集成(工艺创新) - 在130纳米CMOS工艺的后端线中集成了700纳米直径的FeCAP,实现了兆级容量和高可靠性,残余极化(Pr)超过30 µC/cm²。
Abstract
Hf 0.5Zr0.5O2 (HZO)-based ferroelectric random access memory (FeRAM) is a good candidate for the embedded nonvolatile memory (eNVM) applications because of its high reliability, high speed, good scalability, and process compatibility with logic large-scale integrated circuits (LSIs). However, chal- lenges still exist in designing robust read/write circuits for high reliability and sufficient read yield. This work presents a 9-Mb (8 + 1-Mb error correcting code (ECC)) HZO-based nonvolatile FeRAM chip with high-performance read and write peripheral circuits. A TiN/HZO/TiN ferroelectric capacitor (FeCAP) is integrated in the back-end-of-line of a 130-nm CMOS process with a 700-nm-diameter capacitor and a mega-level capacity. A temperature-aware ECC-assisted write driver (ECC-WD) is designed to improve the reliability and power efficiency of FeRAM. The offset-canceled sense amplifier (SA) and a dummy-based reference generator are designed to tolerate a small bitline (BL) signal margin and to reduce the read bit-error rate (BER). Measurement results show 2× remnant polarization ( Pr) > 30 µC/cm2, >1012-cycle endurance, 7-ns write and 5-ns read time, sub-3-V operating voltage, and 10-year data retention at 85 ◦C.