A Five-Tap Delay-Line-Based Feed-Forward-Equalizer for 200-Gbs Wireline Receiver

Abstract

This article presents a five-tap delay-line-based feed-forward equalizer (FFE) for 200-Gb/s wireline receiver (RX) in 28-nm CMOS technology. The RX FFE employs ON-chip grounded coplanar waveguides (GCPWs) as delay lines and a one-stage topology for higher bandwidth and lower power. Two large taps are implemented with distributed amplifiers to alle- viate reflection. Cross-connected variable-transconductance cells improve linearity for small coefficients. RC source degeneration in the variable-tr