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JSSC 2024第1期Memory22nmSRAM

A Floating-Point 6T SRAM In-Memory-Compute Macro Using Hybrid-Domain Structure f

提出一种混合域结构的浮点6T SRAM内存计算宏,实现高能效和高精度
72.14 TFLOPS/W (BF16输入/权重, FP32输出, 128次累加)
浮点计算内存计算混合域结构6T SRAM人工智能边缘设备
混合域宏结构实现指数和尾数在同一CIM宏内计算
时间域计算方案实现高能效指数计算
基于乘积指数的输入尾数对齐方案实现同列尾数累加
位值依赖的数字-模拟混合计算方案实现高精度尾数计算
Abstract
Advanced artificial intelligence edge devices are expected to support floating-point (FP) multiply and accumu- lation operations while ensuring high energy efficiency and high inference accuracy. This work presents an FP compute-in- memory (CIM) macro that exploits the advantages of computing in the time, digital, and analog-voltage domain for high energy efficiency and accuracy. This work employs: 1) a hybrid-domain macrostructure to enable the computation of both the exponent and mantissa with