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JSSC 2024第1期Data Converters65nm

Analysis and Design of Wideband Filtering ADCs Using Continuous-Time Pipelining

宽带连续时间流水线ADC设计与分析,采用热噪声估计数字重构滤波器抽头,实现高效能转换。
65nm CMOS, 1.2V, 800MS/s, 12.5-bit, 59mW
宽带ADC连续时间流水线数字重构滤波器热噪声估计半速率模式
利用热噪声估计数字重构滤波器抽头
半速率模式降低后端采样率
连续时间流水线结构实现高效滤波与转换
Abstract
We describe the advantages and challenges encoun- tered during the design of wideband continuous-time pipeline (CTP) analog-to-digital converters (ADCs). The converter incor- porates an area- and power-efficient foreground technique that exploits thermal noise to estimate the taps of digital recon- struction filters of the pipeline. The design features a half-rate mode that exploits the sharp filtering characteristic of the CTP to reduce the back-end sampling rate, thereby lowering power dissipa