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A Four-Phase Time-Based Switched-Capacitor LDO With 13-ns Settling Time at 05-V
提出一种四相时间开关电容LDO，具有13ns快速响应和低静态电流。
28nm CMOS, 0.45-1V输入, 0.35-0.95V输出, 400mA负载, 3.0fs FoM
开关电容LDO时间量化器瞬态响应低电压四相控制
▸四相时间量化器实现高比例增益控制和短瞬态响应
▸9.6pF耦合电容减少负载切换时的电压跌落
▸电容充放电机制增强工艺和温度变化的鲁棒性
Abstract
This article presents a four-phase time-based
switched-capacitor low-dropout (SCLDO) regulator that regu-
lates an output load voltage ( VOUT) of 0.35–0.95 V with an input
voltage ( VIN) of 0.45–1 V . The regulator employs a four-phase
time quantizer, which enables high proportional gain control
and short transient response time with relatively low quiescent
current. In addition, the proposed SCLDO employs a 9.6-pF
coupling capacitor ( CC) that is connected to the gate voltage of
the pass transi