JSSC 2024第2期RF & Wireless28nmPower Amplifier

A Fully Integrated Digital Polar Transmitter With Single-Ended Doherty PA and DLL-Based Three-Segment Hybrid DTC in 28 nm CMOS Tao Wang , Jieyang Li, Di Hua, Liangbo Lei

本文提出了一种集成数字极性发射器，采用单端多尔蒂功率放大器和数字时间转换器，显著提高了功率附加效率。

28nm CMOS, 2.1GHz, 峰值输出功率27.7dBm, 峰值PAE 33.4%

数字极性发射器单端多尔蒂功率放大器数字时间转换器功率附加效率28nm CMOS

▸创新点1：单端多尔蒂功率放大器拓扑结构（电路创新）。采用开关电容阵列技术，生成四个功率效率峰值，显著提升功率放大器在功率回退（PBO）时的功率附加效率（PAE），在2.5、6和12 dB PBO下分别实现31.1%、24.5%和18%的PAE。

▸创新点2：三片段数字时间转换器（DTC）（电路创新）。基于延迟锁定环（DLL）设计，实现360°全输出相位范围，相位分辨率高（±1.3° DNL，±1.7° INL），功耗仅14 mW，同时支持实时PVT校准。

▸创新点3：实时PVT校准技术（系统创新）。通过DLL实现的DTC动态校准，有效补偿工艺、电压和温度变化对相位精度的影响，确保系统稳定性和性能一致性。

▸创新点4：全集成数字预失真（DPD）算法（系统创新）。仅依赖片内DPD算法即实现优异线性度（EVM低至-30.6 dB，ACLR优于-34.2 dBc），简化外部校准需求。

Abstract

This article presents a fully integrated digital polar transmitter (DPTX) incorporating an efficiency-enhanced digital power amplifier (DPA) and a high-resolution digital-to-time converter (DTC). The proposed single-ended Doherty (SED) PA topology with switched-capacitor (SC) arrays can gener- ate four power efficiency peaks that significantly improve the power-added efficiency (PAE) at the power amplifier (PA)’s power back-offs (PBOs). In addition, this work utilizes a three-segment DTC, built with a delay-locked loop (DLL), to improve the phase resolution and enable real-time process- voltage-temperature (PVT) calibration of the DTC. Fabricated in a 28 nm CMOS technology, the DPTX achieves a peak output power ( Pout) of 27.7 dBm and a peak PAE of 33.4% at a 2.1 GHz carrier frequency. The PAEs at 2.5, 6, and 12 dB PBOs are 31.1%, 24.5%, and 18%, respectively. With the 2.1 GHz carrier, the DTC achieves 360 ◦ full output phase range, ±1.3◦ differen- tial nonlinearity (DNL), ±1.7◦ integral nonlinearity (INL), and −133.86 dBc/Hz phase noise at a frequency offset of 1 MHz, while the power dissipation is only 14 mW. When testing the 10 MHz (and 20 MHz) long term evolution (LTE) 64 QAM signals with a 6.2 (5.0) dB peak-to-average power ratio (PAPR), the DPTX achieves an average Pout of 21.5 (22.7) dBm, an average PAE of 23.5% (24.6%), an average system efficiency (SE) of 22.5% (23.8%), –30.6 (–27.7) dB error vector magnitude (EVM), and –34.2/–32.6 (–30.1/–29.2) dBc adjacent channel