An Interference-Resilient Bit-Level Duty-Cycled ULP Receiver Leveraging a Dual-Chirp Modulation Milad Moosavifar , Jaeho Im , and David D. Wentzloff , Senior Member , IEEE

Abstract

In this article, we present a blocker-tolerant ultralow-power (ULP) receiver (RX) operating at the 430-MHz industrial, scientific, and medical (ISM) band for Internet of Things (IoT) applications, which leverages a chirp modulation scheme to achieve high blocker tolerance. The presented RX simultaneously achieves ULP consumption, high RX sensitivity, and enhanced in-band (IB) and out-of-band (OOB) interference tolerance. This is enabled by a unique dual-chirp ON–OFF- keying (DC-OOK) modulation scheme in conjunction with several architecture and circuit-level techniques, including bit-level duty- cycling and cost-/energy-efficient high- Q radiofrequency (RF) amplifiers. As a result, this RX offers high channel selectivity and good immunity to interference without the need for OFF-chip high- Q surface acoustic wave (SA W) and BA W filters or high-power active filters. The RX prototype was designed and fabricated in a bulk CMOS 28-nm process and achieves −103 dBm sensitivity for bit error rate (BER) < 10−3 while rejecting amplitude-modulated blockers as strong as 41 dBc at a 10-MHz frequency offset. The RX operates at 2.5-kb/s data rate and consumes 110- µW average dc power.