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JSSC 2024第3期Memory65nmCIM

A 4-bit Calibration-Free Computing-In-Memory Macro With 3T1C Current-Programed D

提出一种无需校准的4位电流编程存内计算宏，采用3T1C eDRAM单元，提升能效和精度。
65nm CMOS, 233-304 TOPS/W, 0.4ms刷新间隔, CIFAR10 >90%推理准确率
存内计算电流编程3T1C单元能效优化神经网络加速
▸3T1C eDRAM单元实现电流编程存内计算
▸电压-电流两步编程方案提升写入速度
▸伪差分CIM单元支持4位有符号权重
Abstract
Analog computing-in-memory (CIM) has been widely explored for computing neural networks (NNs) efficiently. However, most analog CIM implementations trade compute accuracy for energy efficiency. The low accuracy restricts the practical application of analog CIM. In this article, a current- programming CIM that unifies the weight programming and computing in the current domain is proposed to address this dilemma. The enabled technique is a novel 3-transistor 1- capacitor (3T1C) embedded dynamic ra