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A Fully Integrated 135-GHz Direct-Digital 16-QAM Wireless and Dielectric Waveguide Link in 28-nm CMOS Carl D’heer
本文介绍了一种135 GHz全集成直接数字16-QAM通信链路。
28nm CMOS, 32 Gb/s无线信道, 24 Gb/s介质波导信道, 9 pJ/b能效
16-QAM135 GHz全集成直接数字调制介质波导
▸无需高速DAC的低EVM 16-QAM调制
▸模拟域16-QAM解调避免高速ADC
▸首次实现亚太赫兹频率全集成16-QAM链路
Abstract
This article presents a fully integrated direct-digital 16-quadrature amplitude modulation (QAM) communication link operating at 135 GHz. The transmitter employs a Cartesian direct-digital modulation architecture capable of generating a low-EVM 16-QAM constellation without relying on high-speed digital-to-analog converters (DACs). The receiver performs on- chip 16-QAM demodulation in the analog domain by means of pulse amplitude modulation (PAM-4) decoders, obviating the need for high-speed analog-to-digital converters (ADCs). The transmitter and receiver chips were fabricated in 28-nm CMOS and were used to establish both a wireless and a dielectric waveg- uide (DWG) link via off-chip Vivaldi antennas. The transmitter achieves a saturated output power of 0 dBm, while the receiver demonstrates a conversion gain and minimum noise figure of 25 and 6 dB, respectively. A data rate of 32 Gb/s with a 9-pJ/b energy efficiency was achieved over a wireless channel with on- chip 16-QAM modulation and demodulation and without any offline digital signal processing (DSP). Over a DWG channel, a data rate of 24 Gb/s was demonstrated with a link efficiency of 12 pJ/b. This work presents the first fully integrated 16-QAM link with on-chip modulation and demodulation in the sub-terahertz (THz) frequency range.