← 返回 JSSC 论文列表JSSC 2024第4期Data Converters180nmDAC
A Display Source-Driver IC Featuring Multistage-Cascaded 10-Bit DAC and True-DC-
一种采用多级级联10位DAC和真直流技术的面积高效显示源驱动IC
180nm CMOS, 1.8/5V, 最大DNL -0.37 LSB, 最大INL 1.17 LSB, 最大DVO 15.5mV
显示源驱动IC10位DAC多级级联真直流面积效率
▸三阶段级联插值设计解决方案
▸重叠开关合并(OSM)技术减小尺寸
▸位自适应开关尺寸(BASS)调制减少开关误差
Abstract
This article presents an area-efficient 10-bit source-
driver IC (SD-IC) for mobile displays. Addressing the challenge
of exponential die area growth associated with higher digital-
to-analog converter (DAC) resolution dominating color depth,
we propose a three-stage-cascading interpolation design solu-
tion. In the first stage, a two-output voltage selector selects
adjacent voltages from the global resistor string. The proposed
overlap-switch merging (OSM) technique reduces its size by
two time