← 返回 JSSC 论文列表JSSC 2024第4期Power Management180nmBuck Converter
An Outphase-Interleaved Switched-Capacitor Hybrid Buck Converter With Relieved C
提出一种相位交错混合降压转换器,缓解电容充电电流并提升效率。
180nm CMOS, 1.8-3.3V输入, 0.8-1.8V输出, 峰值效率97.3%, 电流密度585mA/mm³
降压转换器开关电容相位交错门驱动方案高效率
▸创新点1:相位交错SC单元延长CF平衡相位(方法创新)。通过提出的outphase-interleaved SC拓扑,显著延长了飞跨电容(CF)的电荷平衡相位,同时不干扰电感器的伏秒平衡(VSB),有效解决了传统SC双路/多路(DP/MP)混合降压转换器在极端占空比下CF浪涌电流急剧增加的问题。
▸创新点2:全片上门驱动方案减少振铃(电路创新)。采用面积效率高的全片上门驱动方案,结合共享电荷泵(CP),确保全NMOS功率开关的正确操作,显著降低了栅极驱动路径的振铃现象,提升了系统的稳定性和效率。
▸创新点3:不依赖输出电容的正常操作(系统创新)。该拓扑设计实现了无需依赖输出电容(COUT)的正常操作,从而提高了转换效率和功率密度,支持负载电流从0.05到3.1 A的宽范围变化,输入电压1.8–3.3 V转换为输出电压0.8–1.8 V。
▸创新点4:高效率和功率密度(性能创新)。在180-nm CMOS工艺下实现,芯片面积为7.63 mm²,峰值转换效率达到97.3%,整体峰值电流密度为585 mA/mm³,效率为90.1%,展现了卓越的性能和紧凑的设计。
Abstract
This article presents an efficient buck converter
design using the proposed outphase-interleaved hybrid switched-
capacitor (OISC) topology. The outphase-interleaved switched-
capacitor (SC) cells significantly extend the CF charge-balancing
phase without disturbing the inductor volt-second balance (VSB),
while doubling the effective inductor switching frequency for
reduced current ripple. As a result, it addresses the intrinsic issue
of sharply increased flying capacitor ( CF) inrush current in