← 返回 JSSC 论文列表JSSC 2024第5期RF & Wireless130nmHigh-Speed Link
Parallel Versus Serial: Design of an Optical Receiver With Integrated Blue Photodetectors and Digitally Tunable Low-End Cutoff Frequency for MicroLED-Based Parallel Interchip Communication
比较并行与串行光链路的能效,提出集成蓝光光电探测器的并行光接收机设计。
130nm CMOS SOI, 2Gbps, -19.3dBm灵敏度, 0.5pJ/bit能效
并行光链路蓝光光电探测器能效优化数字偏移消除CMOS SOI
▸并行光链路相比串行链路能效提升10倍以上
▸集成蓝光光电探测器实现低电容高能效前端
▸数字偏移消除技术实现低截止频率和小面积
Abstract
This article first analytically compares the energy efficiency of a serial optical link with a parallel link with the same data throughput and bit error rate for interchip communication. The analysis predicts that more than 10× energy efficiency improvement is feasible at both TX and RX in a parallel optical link compared to the fastest serial link, depending on the technology. Next, the article presents the design of an optical receiver integrated with on-chip blue photodetectors for the parallel interchip communication. The blue light allows using high-speed microLEDs and enables CMOS compatible photodetector structures that have extremely low capacitance per unit area. This along with a transimpedance-to-noise optimization approach results in a highly energy efficient and compact analog front-end for the receiver, paving the way for dense and energy efficient parallel links. Besides, a digital offset cancellation technique is proposed for offset compensation that can provide a low-end cutoff frequency down to a few hertz with a compact area. As a proof of concept, a 32 elements optical receiver array is fabricated in a low-cost 130 nm CMOS SOI process, with each element occupying only 50 × 50 µm in area. Free space optical measurement results of a single receiver array element show a sensitivity of −19.3 dBm with a bit error rate of 10 −12 at a data rate of 2 Gbps and an energy efficiency of about 0.5 pJ/bit.