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JSSC 2024第6期Digital Circuits40nm

A 288-mW Accelerator IC for Dark Channel Prior-Based Blind Image Deblurring Po-S

本文提出了一种基于暗通道先验的盲图像去模糊加速器,显著降低了计算延迟和功耗。
40nm CMOS, 0.65V, 65MHz, 28.8mW
暗通道先验盲图像去模糊加速器FFT卷积引擎
2-D Laplace方程求解器减少56%边界包裹延迟
梯度数据局部性减少57%潜在图像估计延迟
并行架构2-D卷积引擎减少79%模糊核估计延迟
Abstract
This work presents an accelerator that performs blind deblurring based on the dark channel prior. The alternating minimization algorithm is leveraged for latent image and blur kernel estimation. A 2-D Laplace equation solver is embedded to reduce the latency by 56% for boundary wrapping. For latent image estimation, gradient data locality is employed to reduce the latency by 57%. A sorting engine is designed to reduce the latency in data access by 96% for calculating the dark channel. A pipeline