Abstract
This article presents a wideband blocker tolerant receiver (RX) for fifth-generation (5G) user equipment applica- tions. Two programmable zeros around the channel bandwidth are introduced to sufficiently suppress the close-in blockers of 5G applications. Since the effect of zeros gradually diminishes at larger out-of-band offset frequencies, an auxiliary current- sinking path is also introduced to reduce the RX input impedance at far-out offset frequencies. Moreover, a simple second-order transimpedance amplifier (TIA) is adopted to enhance the pro- posed RX selectivity. The utilized TIA synthesizes two complex conjugate poles to achieve a flat gain response and −40 dB/dec roll-off. A 40-nm CMOS RX prototype occupies 1.15 mm 2 and consumes 84–140 mW from a 1.3-V supply voltage over the 0.5–3-GHz operating frequency range. The RX achieves a 160-MHz RF bandwidth, 2.6–4.2-dB noise figure, a −0.3-dBm blocker 1-dB compression point (B1dB), and an out-of-band third-order intercept point (IIP3) of 22.5 dBm. As a test case, using the 3GPP standard, a −15-dBm continuous wave (CW) close-in out-of-band blocker located at 85-MHz offset from the passband edges is applied to the RX. Thanks to the receiver’s high selectivity, the RX achieves 100% throughput while detecting 100-MS/s quadrature phase shift keying (QPSK) signal with 16 dB higher power than the reference sensitivity.