← 返回 JSSC 论文列表
📄 下载 JSSC 原文 PDF
JSSC 2024第6期Digital CircuitsNeural Network Accelerator

Analysis and Comparison of Logic Architectures for Digital Circuits in a-IGZO Th

分析比较五种逻辑架构在a-IGZO TFT技术中的性能与适用性。
6英寸玻璃晶圆和柔性基板上的a-IGZO TFT
a-IGZO逻辑架构双栅自对准逆变器RFID
五种逻辑架构的详细分析与比较
使用双栅自对准技术处理a-IGZO器件
设计并表征逆变器、环形振荡器和RFID兼容电路
Abstract
In this work, five different logic architectures [diode-load (DL), dual-input diode-load (DINP-DL), pseudo- CMOS (P-CMOS), crossover, and differential] for digital circuits in amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistor (TFT) technologies are analyzed and compared. Dual- gate self-aligned (DGSA) lab technology is used to process n-type devices with a-IGZO channel on 6-in glass wafers and flexi- ble substrates. Inverters, ring oscillators, and RFID-compatible 12-bit Manchest