JSSC 2024第7期Digital Circuits180nmNeural Network Accelerator

A 38-mW 19-m Hz Electrical Impedance Tomography IC With High Input Impedance and

一款低功耗高输入阻抗的3D电阻抗断层成像芯片，提升接触阻抗变化下的稳定性。

3.8mW功耗（不包括注入电流），1.9mΩ/√Hz阻抗分辨率，2.9GΩ@100Hz输入阻抗，230kΩ@1MHz输入阻抗

电阻抗断层成像高输入阻抗低功耗3D成像癌症检测

▸高输入阻抗仪表放大器（IA）与辅助源跟随器确保稳健电压传感

▸跨导（TC）电流驱动器与跨阻（TI）监测电路实现精确电流测量并消除负载效应

▸3D可旋转成像应用设计，可直接旋转乳房模型定位癌症

Abstract

This article introduces an advanced 3-D electrical impedance tomography (EIT) imaging system for improving stability in the face of contact impedance variations. The 6-mm 2 chip is manufactured through a TSMC 180-nm CMOS process and incorporates two key features: 1) a high-input-impedance instrumentation amplifier (IA) with auxiliary source followers to ensure robust voltage sensing and 2) a trans-conductance (TC) current driver with a trans-impedance (TI) monitoring circuit, enabling precise me