← 返回 JSSC 论文列表JSSC 2024第7期RF & Wireless28nmPower Amplifier
A Quadrature Digital Power Amplifier With Wide Efficiency Enhancement Coverage and High Dynamic Power Range
提出一种15位正交数字功率放大器,具有宽效率增强覆盖和高动态功率范围。
28nm CMOS, 29.9 dBm峰值输出功率, 38.0% PAE, 70.4-dB动态功率范围
正交数字功率放大器效率增强复杂域DohertyIQ单元共享Class-G技术
▸创新点1:复杂域Doherty技术(系统创新) - 该技术通过在IQ复平面上实现32个功率附加效率(PAE)峰值,显著提升了DPA在复杂调制信号下的效率覆盖范围和动态功率范围,相比传统Doherty结构具有更广的效率增强能力。
▸创新点2:IQ单元共享(电路创新) - 通过共享IQ路径的单元电路,减少了硬件冗余和芯片面积(仅0.74mm²),同时保持15位分辨率,在28nm CMOS工艺中实现了单变压器占位的紧凑设计。
▸创新点3:单电源Class-G技术(电源管理创新) - 采用单一电源供电的Class-G架构简化了电源管理设计,结合特殊控制逻辑方案,在2.3GHz下实现38%的峰值PAE和70.4dB动态范围,显著降低系统复杂度。
▸创新点4:开关电容功率放大器(SCPA)建模方法(方法创新) - 通过理论建模量化分析调制信号的平均效率特性,为复杂域效率优化提供可验证的设计框架,支持LTE 64-QAM和802.11ax 256-QAM信号的高线性度(EVM<-43dB)。
Abstract
A 15-bit quadrature digital power amplifier (DPA) is presented for wide efficiency enhancement coverage on the IQ complex plane and high dynamic power range. Complex-domain Doherty is proposed with IQ-cell-sharing and single-supply Class-G techniques to provide 32 power-added efficiency (PAE) peaks, good linearity, and simplified power management design. The efficiency enhancement and average efficiency of modulation signal can be verified and evaluated by a theoretical analysis using a switched-capacitor power amplifier (SCPA) model. The special control logic scheme enabling the combination of IQ-cell-sharing and Class-G techniques is implemented at a low cost. Fabricated in a 28-nm CMOS technology, the proposed DPA occupies a 0.74-mm2 compact die size with a single-transformer footprint. The DPA achieves a peak output power of 29.9 dBm with a PAE of 38.0% at 2.3 GHz. For long-term evolution (LTE) 20-MHz 64-QAM signal, the DPA obtains 24.5-dBm average output power ( Pavg), 25.3% average PAE with 70.4-dB dynamic power range, and −47.3-dB error vector magnitude (EVM) floor at 2.3 GHz. For the 802.11ax 40-MHz 256-QAM signal, it achieves 19.3-dBm Pavg, 19.2% average PAE with 50.4-dB dynamic power range, and −43.0-dB EVM floor at 2.4 GHz.