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JSSC 2024第8期Power Management55nmBuck Converter

A Fully Integrated Multi-Phase V oltage Regulator With Flying-Capacitor-Based Inter-Inductor Current Self-Balancing Scheme and Charge-Recycling

提出一种高功率密度、快速动态电压调节的自平衡电感电流集成电压调节器。
200 MHz/phase, 45 V/µs DVS rate, 40 mA/ns transient slew rate, 0.9 W/mm² power density, 79.1% peak efficiency
集成电压调节器动态电压调节自平衡电感电流电荷回收门驱动高功率密度
两相2L1C降压转换器拓扑减少功率开关和飞电容数量
单飞电容自平衡电感电流
电荷回收门驱动降低开关功率损耗
Abstract
This article presents a fully integrated voltage regulator (FIVR) featuring a high power density, fast dynamic voltage scaling (DVS), and self-balanced inductor currents. The proposed two-phase 2L1C buck converter topology can 2×reduce the number of power switches and flying capacitors (CF) com- pared to the conventional two-phase three-level (2P3L) converters while inheriting the benefit of a lower switching voltage. The single-CF-based self-balancing of the inductor currents with no extra overhead is a key contribution to this work. For the high scalability of the 2L1C topology, the inter-channel balancing (ICB) scheme is also presented. Moreover, the proposed charge-recycling gate driver is capable of reducing the switching power loss. The proposed two-phase FIVR chip with on-chip spiral inductors of 2 nH was fabricated in a 55-nm CMOS process. The chip operating at 200 MHz/phase showed a 45- V/µs DVS rate and a transient slew rate of 40 mA/ns. The measured power density and the peak efficiency were 0.9 W/mm 2 and 79.1%, respectively. The ICB scheme was demonstrated with the four-phase VR chip able to supply a maximum output power of 2 W.