A High-Efficiency 40.68-MHz Single-Stage Dual-Output Regulating Rectifier With ZVS and Synchronous PFM Control for Wireless Powering Ziyang Luo , Student Member , IEEE

Abstract

This article presents a 40.68-MHz single-stage dual- output regulating (SSDOR) rectifier, which has a new rectifier topology with only three active diodes for producing two outputs. Zero-voltage switching (ZVS) turn-on control for each active diode is developed to minimize converter power loss when rectifying 40.68-MHz input ac voltage. Synchronous PFM control is also proposed to regulate both outputs and provides fast load transient responses. Implemented in a 65-nm CMOS process with 2.5-V I/O devices, the proposed SSDOR rectifier is verified to provide two regulated output voltages of 2.2 and 1.1 V , and deliver a maximum output power of 60.5 mW. With a three-active-diode rectifier architecture and ZVS turn-on control, the proposed SSDOR rectifier achieves a peak power efficiency of 90.1%. The output cross-regulation is unnoticeable under load step changes. Compared with the prior art, the proposed dual-output regulating rectifier is the first to support ac input with the highest resonance frequency of 40.68 MHz that results in the reduction of the receiver (RX) coil size by at least four times.