RoboVisio: A Micro-Robot Vision Domain-Specific SoC for Autonomous Navigation Enabling Fully-on-Chip Intelligence via 2-MB eMRAM

Abstract

This article presents RoboVisio, an efficient and highly flexible domain-specific system-on-chip (SoC) for vision tasks in fully autonomous micro-robot navigation. A novel hybrid processing element (PE) is proposed, in which classic vision tasks achieve high efficiency by using a 2-D-mapping architecture, while convolutional neural network (CNN) is executed in an efficient output-channel-parallel systolic manner. Combining both process- ing schemes into a single PE array future-proofs the architecture, facilitating next-generation CNN-heavy vision algorithms, while saving 40% area and leakage with no power overhead and throughput loss, compared with two separate array implementa- tions. To further improve energy and area efficiency, the design incorporates a number of key features: 1) 2-MB magnetoresistive random access memory (MRAM) for non-volatile fully-on-chip weight storage; 2) a unified image-activation memory (IAMEM) with block-swapping-based input/output image buffering that reduces buffer footprint by 50% and eliminates data copy for multi-frame buffering; and 3) a combination of weight buffering and CNN loop ordering that reduces weight memory system power by 75%. Fabricated in 22-nm CMOS, the design achieves 0.22 nJ/pixels for Harris corner feature detection (a classic or non-CNN vision task) and 3.5 TOPS/W (16-bit OP) for CNN, a 40%–170% efficiency improvement over state-of-the-art edge machine learning (ML) SoCs using non-volatile memory (NVM).