JSSC 2024第8期Data Converters28nmDRAMCIM

Scaling-CIM eDRAM In-Memory-Computing Accelerator With Dynamic-Scaling ADC and A

提出一种基于eDRAM的高效能内存计算加速器，通过动态缩放ADC提升信噪比并降低开销。

28nm CMOS, 2.03mm² die area, 800kb eDRAM, 39.7-TOPS/W (8–9 b)

内存计算eDRAM动态缩放ADC信噪比提升能效优化

▸动态缩放ADC（DSA）提升多比特操作的信噪比

▸自适应模拟位并行（AABP）累减少冗余ADC操作

▸层间自适应位截断（LABT）搜索提升基准测试效率

Abstract

This article presents Scaling-computing-in-memory (CIM), an energy-efficient embedded dynamic random access memory (eDRAM)-based in-memory-computing (IMC) accelera- tor with a dynamic-scaling readout for signal-to-quantization- noise ratio (SQNR) boosting and analog-to-digital converter (ADC) overhead reduction. It greatly saves the ADC cost by reducing the required number of ADC-bit and ADC operations by codesigning the algorithm and hardware. Scaling-CIM pro- poses three key features: 1) dynam