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JSSC 2024第9期Power Management180nm BCDNeural Network Accelerator

A 24-V-Input Highly Integrated Interleaved-Inductor Multiple Step-Down Hybrid DC

提出一种24V输入的高集成交错电感多步降压混合DC-DC转换器，采用新型拓扑和片上栅极驱动方案，实现高效能和小尺寸。
24V输入，1-3.5V输出，峰值效率90.4%，最大负载电流5A，效率82%
DC-DC转换器交错电感多步降压高集成片上栅极驱动
▸交错电感多步降压（IL-MSD）拓扑
▸对称功率级操作解决电感电流不平衡
▸片上栅极驱动方案（HVFC）
Abstract
This article presents a highly integrated hybrid dc–dc converter with a 24-V input, employing the interleaved- inductor multiple step-down (IL-MSD) topology. The proposed design ensures symmetric power-stage operations, addressing inductor current ( IL) imbalance without complex regulation control. It also optimizes current distribution among internal con- duction branches, reducing conduction losses and input capacitor requirements. In addition, we propose an on-chip gate-driving scheme utilizi