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JSSC 2024第10期MemoryEmerging Memory

Algorithm 1 NE Code Example for CONV 1 procedure CONVOLUTION LAYER 2 Load weight

论文提出了一种基于MRAM的卷积神经网络加速器设计,优化了权重加载和卷积计算流程。
1.5-kB双端口FFT内存,8-kB乒乓存储器,支持32/64 Mel通道
MRAM卷积神经网络FFTMel滤波能效优化
采用MRAM存储权重,提高能效
优化卷积循环控制,减少计算延迟
集成FFT和Mel滤波模块,支持多精度处理
Abstract
r_MRAM, addr_WeightCache, . . . ) 4: convolution_loop: 5: #Load activation from activation memory to local memory. Then do convolution. 6: MOV(row, col, addr_ActMem, addr_LocalMem, . . . ) 7: CONV(row, col, channel, kernel_size, stride, . . . ) 8: #Register control in NCU for for-loop 9: NCU_ADDI, row, block_size 10: NCU_BLT row, row_size, convolution_loop 11: NCU_MOVI, row, initial_row 12: NCU_ADDI, col, block_size 13: NCU_BLT col, col_size, convolution_loop 14: NCU_MOVI, col, initial_col Fig.