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VI. C ONCLUSION This article demonstrates a hybrid-integrated 112-Gb/s SiPh O-TRX for LD CPO. To achieve high-speed performance while optimizing power consumption, a 180-nm CMOS SOI MZM and Ge PD are proposed. The integration of these SiPh devices enables a compact form factor and reliable performance. The O-TRX also consists of the four-channel driver and TIA developed on a 180-nm SiGe BiCMOS process. The driver uses a custom-designed second-order AFB CTLE and Ind. PEQ to compensate for channel losses up to 12 dB.
本文展示了一种混合集成的112Gb/s硅光子光收发器,优化功耗并实现紧凑可靠性能。
112Gb/s, 10dB通道损耗
硅光子光收发器均衡器BiCMOSPAM-4
▸180nm CMOS SOI MZM和Ge PD集成
▸四通道驱动器和TIA的180nm SiGe BiCMOS工艺
▸嵌入式级联均衡器的宽带均衡设计
Abstract
while optimizing power consumption, a 180-nm CMOS SOI
MZM and Ge PD are proposed. The integration of these
SiPh devices enables a compact form factor and reliable
performance. The O-TRX also consists of the four-channel
driver and TIA developed on a 180-nm SiGe BiCMOS process.
The driver uses a custom-designed second-order AFB CTLE
and Ind. PEQ to compensate for channel losses up to 12 dB.
The TIA uses a cascaded equalizer embedded in its V ASs
to achieve broadband EQ in a co-designed manner. E